Distinct ρ-based model of silicon N-channel double gate MOSFET

<span lang="EN-US">Growing endless demand for digital processing technology, to perform high speed computations with low power utilization and minimum propagation delay, the metal-oxide-semiconductor (MOS) technology is implemented in areas of very large scale integrated (VLSI) circuit technology. But MOS facing challenges linear scaling transistors different channel modelling present day microelectronic regime. Linear MOSFET restricted through short-channel-effects (SCEs). Use silicon N-channel double gate MOSFETs (DG MOSFETs) regime features short effect a reasaonable forward transfer admittance characteristics varying input capacitance values ratio. In this research paper, distinct ρ-based model designed simulate SCEs front back doping level surface regions estimate junction capacitances can limit intrusion detection systems (IDS) usage VLSI applications. Analytical length simulated total internal device are presented. The proposed suitable nanowire effectiveness validated comparative results.</span>